cmldm7005 surface mount silicon dual n-channel enhancement-mode mosfet maximum ratings: (t a =25c) symbol units drain-source voltage v ds 20 v gate-source voltage v gs 8.0 v continuous drain current (steady state - note 1) i d 650 ma continuous source current (body diode) i s 280 ma maximum pulsed drain current i dm 1.3 a power dissipation (note 1) p d 350 mw power dissipation (note 2) p d 300 mw power dissipation (note 2) p d 150 mw operating and storage junction temperature t j , t stg -65 to +150 c thermal resistance (note 1) ja 357 c/w electrical characteristics per transistor: (t a =25c unless otherwise noted) symbol test conditions min typ max units i gssf , i gssr v gs =4.5v, v ds =0 1.0 a i dss v ds =16v, v gs =0 100 na bv dss v gs =0, i d =250a 20 v v gs(th) v ds =v gs , i d =250a 0.5 1.1 v v sd v gs =0, i s =200ma 1.1 v r ds(on) v gs =4.5v, i d =600ma 0.14 0.23 r ds(on) v gs =2.5v, i d =500ma 0.2 0.275 r ds(on) v gs =1.8v, i d =350ma 0.7 g fs v ds =10v, i d =400ma 1.0 s description: the central semiconductor cmldm7005 consists of dual n-channel enhancement-mode silicon mosfets designed for high speed pulsed amplifier and driver applications. these mosfets offer very low r ds(on) and low threshold voltage. marking code: cc7 features: ? esd protection up to 2kv (human body model) ? 350mw power dissipation ? very low r ds(on) ? low threshold voltage ? logic level compatible ? small, sot-563 surface mount package ? complementary dual p-channel device: cmldm8005 applications: ? load switch/level shifting ? battery charging ? boost switch ? electro-luminescent backlighting notes: (1) ceramic or aluminum core pc board with copper mounting pad area of 4.0mm 2 (2) fr-4 epoxy pc board with copper mounting pad area of 4.0mm 2 (3) fr-4 epoxy pc board with copper mounting pad area of 1.4mm 2 sot-563 case r3 (10-june 2013) www.centralsemi.com
cmldm7005 surface mount silicon dual n-channel enhancement-mode mosfet sot-563 case - mechanical outline electrical characteristics per transistor - continued: (t a =25c unless otherwise noted) symbol test conditions typ max units c rss v ds =16v, v gs =0, f=1.0mhz 18 pf c iss v ds =16v, v gs =0, f=1.0mhz 100 pf c oss v ds =16v, v gs =0, f=1.0mhz 16 pf q g(tot) v ds =10v, v gs =4.5v, i d =500ma 1.58 nc q gs v ds =10v, v gs =4.5v, i d =500ma 0.17 nc q gd v ds =10v, v gs =4.5v, i d =500ma 0.24 nc t on v dd =10v, v gs =4.5v, i d =200ma, r g =10 10 ns t off v dd =10v, v gs =4.5v, i d =200ma, r g =10 25 ns pin configuration lead code: 1) source q1 2) gate q1 3) drain q2 4) source q2 5) gate q2 6) drain q1 marking code: cc7 www.centralsemi.com r3 (10-june 2013)
cmldm7005 surface mount silicon dual n-channel enhancement-mode mosfet n-channel typical electrical characteristics r3 (10-june 2013) www.centralsemi.com
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